Lab 7: Processor Architectures

Submission Due: the beginning of your lab session two weeks from when it was assigned

In this laboratory, you will be investigating different architectures and answer the following questions.

Lab Assignment

To complete this lab, you will pick two processor architectures to investigate. You can choose any two of the following processor architectures to investigate: x86-32, x86-64, Power, Sparc, ARM, Mips, Alpha, Itanium, 68000. If you choose one of the x86 extensions, you are not allowed to choose the other x86 extension as your second architecture.

You will need to find out the following information about two different processor architectures:

  1. Basic Information

    • Is the processor a RISC or a CISC architecture?

    • Describe the cache layout of the processor (name the processor model selected, if applicable).

    • Is this a fixed-width or variable-width instruction set?

  2. Supported Data Types

    • What data types are supported?

    • What are the bit-widths of those data types

    • Are the data types stored in big-endian, little-endian, or some other format?

  3. Register Set

    • Describe the number and type of registers available in the processor

    • What is the bit-width of each register?

  4. Describe the instruction encodings for one Arithmetic instruction (Like Add, Mul), one Memory Access instruction (Like load, store), one Call instruction and one Conditional branch instruction?

  5. Is the instruction set zero-address, one-address, two-address, three-address or something else. Justify your answer?

For part 1, you must include the information you found in the lab report. Be sure to write up your investigation as a report, not as a series of questions and answers. Tables and pictures will be useful when making this report. You must give references and citations for each piece of information collected above. Wikipedia is not a valid reference for this lab, though it may be a good place to start your investigation.